Port fedora for RISC-V with out compressed instructions

We want to port fedora for RISC-V with out compressed (RV64IMAFD) instructions. We are from Centre for Development of Advanced Computing (C-DAC) India. We have implemented an Out-of order quad core RISC-V processor on FPGA. The processor is without compressed instructions. We want to port fedora for RISC-V with out compressed instructions. Please share the link if it is already ported, or give the guidelines on how to port. Regards, Sreenadh S.